Vertical scaling is vital to increasing the storage density of 3D NAND. According to imec, airgap integration and charge trap ...

3D chip stacking has long held promise as a meaningful method of advancing silicon performance, but progress in the field has been slow, to say the least. For one thing, CPUs have a nasty tendency ...

The 3D stacking technology will arrive with 10nm chips, Gomes said, and will follow along with Intel's future manufacturing improvements. Fundamental chip breakthroughs don't come easily.

AMD has better detailed its next-gen 3D V-Cache stacking technology, where at the exciting but all-digital Hot Chips 33 symposium the company teased its current, and even future 3D stacking ...

By Ed Sperling Xilinx is developing a 3D architecture for its FPGAs and Actel has been approached by SoC makers to use its flash-based FPGA as a layer in a 3D IC stack. Both approaches could radically ...

This new material enables chip scaling to 2nm and below, while offering increased mechanical strength to help take 3D logic and memory stacking to new heights. Source: Applied Materials, Inc.