Both cores have a three-stage pipeline that allows the CPU to run at a minimum of two clocks per instruction cycle (versus 12 clocks for the 8051 or four clocks for the Dallas Semiconductor version).

The 8051 is an accumulator-based design with 255 instructions. A basic instruction cycle takes 12 clocks; however, Dallas Semiconductor redesigned the instruction-execution circuitry to reduce the ...

The USB97C210 consists of a USB 2.0 physical layer transceiver and serial interface engine, data buffers, a Fast 8051 microprocessor with expanded scratchpad and program SRAM, and dedicated ...

CAST Releases Fast 8051-Compatible Processor Cores R8051 and R8051C Cores Run Eight Times Faster than Legacy 8051 January 30, 2001, DesignCon, Santa Clara, California - Semiconductor intellectual ...

The 8051 microprocessor core, employing a synthesized static synchronous design, is fully compliant with industry IP standards. Furthermore, Dolphin has provided to SMIC a full set of hardware ...