The fun part about logic gates is that there are so many ways to make them, with each approach having its own advantages and disadvantages. Although these days transistor-transistor logic (TTL) is ...

This paper designs an 8:1 multiplexer with CMOS Transmission Gate Logic (TGL) using the power gating technique, which reduces the leakage power and leakage current in active mode.

Using an old chessboard, eyelets, rings, weights, and string, [Alex] has designed a system that can show off all of the logic gates. This includes: NOT, BUFFER, NAND, AND, OR, NOR, XOR, XNOR.

Pairs of gates can be used to create AND and OR logic based on the levels of output observed. When a pair of gates are both off, output is low; it's higher for a one-on/one-off situation (OR) and ...